
detect-u2:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400830 <_init>:
  400830:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400834:	910003fd 	mov	x29, sp
  400838:	94000068 	bl	4009d8 <call_weak_fn>
  40083c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400840:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400850 <.plt>:
  400850:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400854:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0x100f4>
  400858:	f947fe11 	ldr	x17, [x16, #4088]
  40085c:	913fe210 	add	x16, x16, #0xff8
  400860:	d61f0220 	br	x17
  400864:	d503201f 	nop
  400868:	d503201f 	nop
  40086c:	d503201f 	nop

0000000000400870 <exit@plt>:
  400870:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400874:	f9400211 	ldr	x17, [x16]
  400878:	91000210 	add	x16, x16, #0x0
  40087c:	d61f0220 	br	x17

0000000000400880 <bind@plt>:
  400880:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400884:	f9400611 	ldr	x17, [x16, #8]
  400888:	91002210 	add	x16, x16, #0x8
  40088c:	d61f0220 	br	x17

0000000000400890 <opendir@plt>:
  400890:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400894:	f9400a11 	ldr	x17, [x16, #16]
  400898:	91004210 	add	x16, x16, #0x10
  40089c:	d61f0220 	br	x17

00000000004008a0 <statfs@plt>:
  4008a0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4008a4:	f9400e11 	ldr	x17, [x16, #24]
  4008a8:	91006210 	add	x16, x16, #0x18
  4008ac:	d61f0220 	br	x17

00000000004008b0 <getpid@plt>:
  4008b0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4008b4:	f9401211 	ldr	x17, [x16, #32]
  4008b8:	91008210 	add	x16, x16, #0x20
  4008bc:	d61f0220 	br	x17

00000000004008c0 <setsockopt@plt>:
  4008c0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4008c4:	f9401611 	ldr	x17, [x16, #40]
  4008c8:	9100a210 	add	x16, x16, #0x28
  4008cc:	d61f0220 	br	x17

00000000004008d0 <__libc_start_main@plt>:
  4008d0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4008d4:	f9401a11 	ldr	x17, [x16, #48]
  4008d8:	9100c210 	add	x16, x16, #0x30
  4008dc:	d61f0220 	br	x17

00000000004008e0 <memset@plt>:
  4008e0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4008e4:	f9401e11 	ldr	x17, [x16, #56]
  4008e8:	9100e210 	add	x16, x16, #0x38
  4008ec:	d61f0220 	br	x17

00000000004008f0 <system@plt>:
  4008f0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4008f4:	f9402211 	ldr	x17, [x16, #64]
  4008f8:	91010210 	add	x16, x16, #0x40
  4008fc:	d61f0220 	br	x17

0000000000400900 <close@plt>:
  400900:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400904:	f9402611 	ldr	x17, [x16, #72]
  400908:	91012210 	add	x16, x16, #0x48
  40090c:	d61f0220 	br	x17

0000000000400910 <recv@plt>:
  400910:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400914:	f9402a11 	ldr	x17, [x16, #80]
  400918:	91014210 	add	x16, x16, #0x50
  40091c:	d61f0220 	br	x17

0000000000400920 <__gmon_start__@plt>:
  400920:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400924:	f9402e11 	ldr	x17, [x16, #88]
  400928:	91016210 	add	x16, x16, #0x58
  40092c:	d61f0220 	br	x17

0000000000400930 <abort@plt>:
  400930:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400934:	f9403211 	ldr	x17, [x16, #96]
  400938:	91018210 	add	x16, x16, #0x60
  40093c:	d61f0220 	br	x17

0000000000400940 <puts@plt>:
  400940:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400944:	f9403611 	ldr	x17, [x16, #104]
  400948:	9101a210 	add	x16, x16, #0x68
  40094c:	d61f0220 	br	x17

0000000000400950 <memcmp@plt>:
  400950:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400954:	f9403a11 	ldr	x17, [x16, #112]
  400958:	9101c210 	add	x16, x16, #0x70
  40095c:	d61f0220 	br	x17

0000000000400960 <__isoc99_scanf@plt>:
  400960:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400964:	f9403e11 	ldr	x17, [x16, #120]
  400968:	9101e210 	add	x16, x16, #0x78
  40096c:	d61f0220 	br	x17

0000000000400970 <socket@plt>:
  400970:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400974:	f9404211 	ldr	x17, [x16, #128]
  400978:	91020210 	add	x16, x16, #0x80
  40097c:	d61f0220 	br	x17

0000000000400980 <printf@plt>:
  400980:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400984:	f9404611 	ldr	x17, [x16, #136]
  400988:	91022210 	add	x16, x16, #0x88
  40098c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400990 <_start>:
  400990:	d280001d 	mov	x29, #0x0                   	// #0
  400994:	d280001e 	mov	x30, #0x0                   	// #0
  400998:	aa0003e5 	mov	x5, x0
  40099c:	f94003e1 	ldr	x1, [sp]
  4009a0:	910023e2 	add	x2, sp, #0x8
  4009a4:	910003e6 	mov	x6, sp
  4009a8:	580000c0 	ldr	x0, 4009c0 <_start+0x30>
  4009ac:	580000e3 	ldr	x3, 4009c8 <_start+0x38>
  4009b0:	58000104 	ldr	x4, 4009d0 <_start+0x40>
  4009b4:	97ffffc7 	bl	4008d0 <__libc_start_main@plt>
  4009b8:	97ffffde 	bl	400930 <abort@plt>
  4009bc:	00000000 	.inst	0x00000000 ; undefined
  4009c0:	00400c10 	.word	0x00400c10
  4009c4:	00000000 	.word	0x00000000
  4009c8:	00400d70 	.word	0x00400d70
  4009cc:	00000000 	.word	0x00000000
  4009d0:	00400df0 	.word	0x00400df0
  4009d4:	00000000 	.word	0x00000000

00000000004009d8 <call_weak_fn>:
  4009d8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0x100f4>
  4009dc:	f947f000 	ldr	x0, [x0, #4064]
  4009e0:	b4000040 	cbz	x0, 4009e8 <call_weak_fn+0x10>
  4009e4:	17ffffcf 	b	400920 <__gmon_start__@plt>
  4009e8:	d65f03c0 	ret
  4009ec:	00000000 	.inst	0x00000000 ; undefined

00000000004009f0 <deregister_tm_clones>:
  4009f0:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  4009f4:	91028000 	add	x0, x0, #0xa0
  4009f8:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  4009fc:	91028021 	add	x1, x1, #0xa0
  400a00:	eb00003f 	cmp	x1, x0
  400a04:	540000a0 	b.eq	400a18 <deregister_tm_clones+0x28>  // b.none
  400a08:	90000001 	adrp	x1, 400000 <_init-0x830>
  400a0c:	f9470821 	ldr	x1, [x1, #3600]
  400a10:	b4000041 	cbz	x1, 400a18 <deregister_tm_clones+0x28>
  400a14:	d61f0020 	br	x1
  400a18:	d65f03c0 	ret
  400a1c:	d503201f 	nop

0000000000400a20 <register_tm_clones>:
  400a20:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  400a24:	91028000 	add	x0, x0, #0xa0
  400a28:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  400a2c:	91028021 	add	x1, x1, #0xa0
  400a30:	cb000021 	sub	x1, x1, x0
  400a34:	9343fc21 	asr	x1, x1, #3
  400a38:	8b41fc21 	add	x1, x1, x1, lsr #63
  400a3c:	9341fc21 	asr	x1, x1, #1
  400a40:	b40000a1 	cbz	x1, 400a54 <register_tm_clones+0x34>
  400a44:	90000002 	adrp	x2, 400000 <_init-0x830>
  400a48:	f9470c42 	ldr	x2, [x2, #3608]
  400a4c:	b4000042 	cbz	x2, 400a54 <register_tm_clones+0x34>
  400a50:	d61f0040 	br	x2
  400a54:	d65f03c0 	ret

0000000000400a58 <__do_global_dtors_aux>:
  400a58:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400a5c:	910003fd 	mov	x29, sp
  400a60:	f9000bf3 	str	x19, [sp, #16]
  400a64:	d0000093 	adrp	x19, 412000 <exit@GLIBC_2.17>
  400a68:	39428260 	ldrb	w0, [x19, #160]
  400a6c:	35000080 	cbnz	w0, 400a7c <__do_global_dtors_aux+0x24>
  400a70:	97ffffe0 	bl	4009f0 <deregister_tm_clones>
  400a74:	52800020 	mov	w0, #0x1                   	// #1
  400a78:	39028260 	strb	w0, [x19, #160]
  400a7c:	f9400bf3 	ldr	x19, [sp, #16]
  400a80:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a84:	d65f03c0 	ret

0000000000400a88 <frame_dummy>:
  400a88:	17ffffe6 	b	400a20 <register_tm_clones>

0000000000400a8c <init_socket>:
  400a8c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400a90:	910003fd 	mov	x29, sp
  400a94:	52808000 	mov	w0, #0x400                 	// #1024
  400a98:	b90017a0 	str	w0, [x29, #20]
  400a9c:	910063a0 	add	x0, x29, #0x18
  400aa0:	d2800182 	mov	x2, #0xc                   	// #12
  400aa4:	52800001 	mov	w1, #0x0                   	// #0
  400aa8:	97ffff8e 	bl	4008e0 <memset@plt>
  400aac:	52800200 	mov	w0, #0x10                  	// #16
  400ab0:	790033a0 	strh	w0, [x29, #24]
  400ab4:	97ffff7f 	bl	4008b0 <getpid@plt>
  400ab8:	b9001fa0 	str	w0, [x29, #28]
  400abc:	52800020 	mov	w0, #0x1                   	// #1
  400ac0:	b90023a0 	str	w0, [x29, #32]
  400ac4:	528001e2 	mov	w2, #0xf                   	// #15
  400ac8:	52800041 	mov	w1, #0x2                   	// #2
  400acc:	52800200 	mov	w0, #0x10                  	// #16
  400ad0:	97ffffa8 	bl	400970 <socket@plt>
  400ad4:	b9002fa0 	str	w0, [x29, #44]
  400ad8:	b9402fa0 	ldr	w0, [x29, #44]
  400adc:	3100041f 	cmn	w0, #0x1
  400ae0:	540000c1 	b.ne	400af8 <init_socket+0x6c>  // b.any
  400ae4:	90000000 	adrp	x0, 400000 <_init-0x830>
  400ae8:	91388000 	add	x0, x0, #0xe20
  400aec:	97ffffa5 	bl	400980 <printf@plt>
  400af0:	12800000 	mov	w0, #0xffffffff            	// #-1
  400af4:	97ffff5f 	bl	400870 <exit@plt>
  400af8:	910053a0 	add	x0, x29, #0x14
  400afc:	52800084 	mov	w4, #0x4                   	// #4
  400b00:	aa0003e3 	mov	x3, x0
  400b04:	52800422 	mov	w2, #0x21                  	// #33
  400b08:	52800021 	mov	w1, #0x1                   	// #1
  400b0c:	b9402fa0 	ldr	w0, [x29, #44]
  400b10:	97ffff6c 	bl	4008c0 <setsockopt@plt>
  400b14:	910063a0 	add	x0, x29, #0x18
  400b18:	52800182 	mov	w2, #0xc                   	// #12
  400b1c:	aa0003e1 	mov	x1, x0
  400b20:	b9402fa0 	ldr	w0, [x29, #44]
  400b24:	97ffff57 	bl	400880 <bind@plt>
  400b28:	b9002ba0 	str	w0, [x29, #40]
  400b2c:	b9402ba0 	ldr	w0, [x29, #40]
  400b30:	3100041f 	cmn	w0, #0x1
  400b34:	54000101 	b.ne	400b54 <init_socket+0xc8>  // b.any
  400b38:	90000000 	adrp	x0, 400000 <_init-0x830>
  400b3c:	9138e000 	add	x0, x0, #0xe38
  400b40:	97ffff90 	bl	400980 <printf@plt>
  400b44:	b9402fa0 	ldr	w0, [x29, #44]
  400b48:	97ffff6e 	bl	400900 <close@plt>
  400b4c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400b50:	97ffff48 	bl	400870 <exit@plt>
  400b54:	b9402fa0 	ldr	w0, [x29, #44]
  400b58:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400b5c:	d65f03c0 	ret

0000000000400b60 <get_disk_free_space_percent>:
  400b60:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  400b64:	910003fd 	mov	x29, sp
  400b68:	f90017a0 	str	x0, [x29, #40]
  400b6c:	f90013a1 	str	x1, [x29, #32]
  400b70:	f9000fa2 	str	x2, [x29, #24]
  400b74:	f90057bf 	str	xzr, [x29, #168]
  400b78:	9100c3a0 	add	x0, x29, #0x30
  400b7c:	aa0003e1 	mov	x1, x0
  400b80:	f94017a0 	ldr	x0, [x29, #40]
  400b84:	97ffff47 	bl	4008a0 <statfs@plt>
  400b88:	7100001f 	cmp	w0, #0x0
  400b8c:	540002a1 	b.ne	400be0 <get_disk_free_space_percent+0x80>  // b.any
  400b90:	f9401fa0 	ldr	x0, [x29, #56]
  400b94:	aa0003e1 	mov	x1, x0
  400b98:	f94027a0 	ldr	x0, [x29, #72]
  400b9c:	9b007c20 	mul	x0, x1, x0
  400ba0:	9e630000 	ucvtf	d0, x0
  400ba4:	d2e83a00 	mov	x0, #0x41d0000000000000    	// #4742290407621132288
  400ba8:	9e670001 	fmov	d1, x0
  400bac:	1e611800 	fdiv	d0, d0, d1
  400bb0:	f94013a0 	ldr	x0, [x29, #32]
  400bb4:	fd000000 	str	d0, [x0]
  400bb8:	f9401fa0 	ldr	x0, [x29, #56]
  400bbc:	aa0003e1 	mov	x1, x0
  400bc0:	f94023a0 	ldr	x0, [x29, #64]
  400bc4:	9b007c20 	mul	x0, x1, x0
  400bc8:	9e630000 	ucvtf	d0, x0
  400bcc:	d2e83a00 	mov	x0, #0x41d0000000000000    	// #4742290407621132288
  400bd0:	9e670001 	fmov	d1, x0
  400bd4:	1e611800 	fdiv	d0, d0, d1
  400bd8:	f9400fa0 	ldr	x0, [x29, #24]
  400bdc:	fd000000 	str	d0, [x0]
  400be0:	f94013a0 	ldr	x0, [x29, #32]
  400be4:	fd400001 	ldr	d1, [x0]
  400be8:	f9400fa0 	ldr	x0, [x29, #24]
  400bec:	fd400000 	ldr	d0, [x0]
  400bf0:	1e601820 	fdiv	d0, d1, d0
  400bf4:	d2e80b20 	mov	x0, #0x4059000000000000    	// #4636737291354636288
  400bf8:	9e670001 	fmov	d1, x0
  400bfc:	1e610800 	fmul	d0, d0, d1
  400c00:	fd0057a0 	str	d0, [x29, #168]
  400c04:	fd4057a0 	ldr	d0, [x29, #168]
  400c08:	a8cb7bfd 	ldp	x29, x30, [sp], #176
  400c0c:	d65f03c0 	ret

0000000000400c10 <main>:
  400c10:	d12143ff 	sub	sp, sp, #0x850
  400c14:	a9007bfd 	stp	x29, x30, [sp]
  400c18:	910003fd 	mov	x29, sp
  400c1c:	f90417bf 	str	xzr, [x29, #2088]
  400c20:	f90413bf 	str	xzr, [x29, #2080]
  400c24:	f90427bf 	str	xzr, [x29, #2120]
  400c28:	90000000 	adrp	x0, 400000 <_init-0x830>
  400c2c:	91392000 	add	x0, x0, #0xe48
  400c30:	f90423a0 	str	x0, [x29, #2112]
  400c34:	97ffff96 	bl	400a8c <init_socket>
  400c38:	b9083fa0 	str	w0, [x29, #2108]
  400c3c:	910063a0 	add	x0, x29, #0x18
  400c40:	d2810001 	mov	x1, #0x800                 	// #2048
  400c44:	aa0103e2 	mov	x2, x1
  400c48:	52800001 	mov	w1, #0x0                   	// #0
  400c4c:	97ffff25 	bl	4008e0 <memset@plt>
  400c50:	910063a0 	add	x0, x29, #0x18
  400c54:	52800003 	mov	w3, #0x0                   	// #0
  400c58:	d2810002 	mov	x2, #0x800                 	// #2048
  400c5c:	aa0003e1 	mov	x1, x0
  400c60:	b9483fa0 	ldr	w0, [x29, #2108]
  400c64:	97ffff2b 	bl	400910 <recv@plt>
  400c68:	90000000 	adrp	x0, 400000 <_init-0x830>
  400c6c:	91394001 	add	x1, x0, #0xe50
  400c70:	910063a0 	add	x0, x29, #0x18
  400c74:	d2800082 	mov	x2, #0x4                   	// #4
  400c78:	97ffff36 	bl	400950 <memcmp@plt>
  400c7c:	7100001f 	cmp	w0, #0x0
  400c80:	54fffde1 	b.ne	400c3c <main+0x2c>  // b.any
  400c84:	90000000 	adrp	x0, 400000 <_init-0x830>
  400c88:	91396000 	add	x0, x0, #0xe58
  400c8c:	97ffff2d 	bl	400940 <puts@plt>
  400c90:	90000000 	adrp	x0, 400000 <_init-0x830>
  400c94:	9139a000 	add	x0, x0, #0xe68
  400c98:	97ffff2a 	bl	400940 <puts@plt>
  400c9c:	91207fa1 	add	x1, x29, #0x81f
  400ca0:	90000000 	adrp	x0, 400000 <_init-0x830>
  400ca4:	913a0000 	add	x0, x0, #0xe80
  400ca8:	97ffff2e 	bl	400960 <__isoc99_scanf@plt>
  400cac:	39607fa0 	ldrb	w0, [x29, #2079]
  400cb0:	7101e41f 	cmp	w0, #0x79
  400cb4:	54000080 	b.eq	400cc4 <main+0xb4>  // b.none
  400cb8:	39607fa0 	ldrb	w0, [x29, #2079]
  400cbc:	7101641f 	cmp	w0, #0x59
  400cc0:	540001e1 	b.ne	400cfc <main+0xec>  // b.any
  400cc4:	f94423a0 	ldr	x0, [x29, #2112]
  400cc8:	97fffef2 	bl	400890 <opendir@plt>
  400ccc:	f9041ba0 	str	x0, [x29, #2096]
  400cd0:	f9441ba0 	ldr	x0, [x29, #2096]
  400cd4:	f100001f 	cmp	x0, #0x0
  400cd8:	540000a1 	b.ne	400cec <main+0xdc>  // b.any
  400cdc:	90000000 	adrp	x0, 400000 <_init-0x830>
  400ce0:	913a2000 	add	x0, x0, #0xe88
  400ce4:	97ffff17 	bl	400940 <puts@plt>
  400ce8:	1400001e 	b	400d60 <main+0x150>
  400cec:	90000000 	adrp	x0, 400000 <_init-0x830>
  400cf0:	913a6000 	add	x0, x0, #0xe98
  400cf4:	97fffeff 	bl	4008f0 <system@plt>
  400cf8:	1400001a 	b	400d60 <main+0x150>
  400cfc:	39607fa0 	ldrb	w0, [x29, #2079]
  400d00:	7101381f 	cmp	w0, #0x4e
  400d04:	54000080 	b.eq	400d14 <main+0x104>  // b.none
  400d08:	39607fa0 	ldrb	w0, [x29, #2079]
  400d0c:	7101b81f 	cmp	w0, #0x6e
  400d10:	54000281 	b.ne	400d60 <main+0x150>  // b.any
  400d14:	912083a1 	add	x1, x29, #0x820
  400d18:	9120a3a0 	add	x0, x29, #0x828
  400d1c:	aa0103e2 	mov	x2, x1
  400d20:	aa0003e1 	mov	x1, x0
  400d24:	f94423a0 	ldr	x0, [x29, #2112]
  400d28:	97ffff8e 	bl	400b60 <get_disk_free_space_percent>
  400d2c:	fd0427a0 	str	d0, [x29, #2120]
  400d30:	fd4417a0 	ldr	d0, [x29, #2088]
  400d34:	90000000 	adrp	x0, 400000 <_init-0x830>
  400d38:	913aa000 	add	x0, x0, #0xea8
  400d3c:	97ffff11 	bl	400980 <printf@plt>
  400d40:	fd4413a0 	ldr	d0, [x29, #2080]
  400d44:	90000000 	adrp	x0, 400000 <_init-0x830>
  400d48:	913b2000 	add	x0, x0, #0xec8
  400d4c:	97ffff0d 	bl	400980 <printf@plt>
  400d50:	90000000 	adrp	x0, 400000 <_init-0x830>
  400d54:	913ba000 	add	x0, x0, #0xee8
  400d58:	fd4427a0 	ldr	d0, [x29, #2120]
  400d5c:	97ffff09 	bl	400980 <printf@plt>
  400d60:	52800000 	mov	w0, #0x0                   	// #0
  400d64:	a9407bfd 	ldp	x29, x30, [sp]
  400d68:	912143ff 	add	sp, sp, #0x850
  400d6c:	d65f03c0 	ret

0000000000400d70 <__libc_csu_init>:
  400d70:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400d74:	910003fd 	mov	x29, sp
  400d78:	a901d7f4 	stp	x20, x21, [sp, #24]
  400d7c:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0x100f4>
  400d80:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0x100f4>
  400d84:	91374294 	add	x20, x20, #0xdd0
  400d88:	913722b5 	add	x21, x21, #0xdc8
  400d8c:	a902dff6 	stp	x22, x23, [sp, #40]
  400d90:	cb150294 	sub	x20, x20, x21
  400d94:	f9001ff8 	str	x24, [sp, #56]
  400d98:	2a0003f6 	mov	w22, w0
  400d9c:	aa0103f7 	mov	x23, x1
  400da0:	9343fe94 	asr	x20, x20, #3
  400da4:	aa0203f8 	mov	x24, x2
  400da8:	97fffea2 	bl	400830 <_init>
  400dac:	b4000194 	cbz	x20, 400ddc <__libc_csu_init+0x6c>
  400db0:	f9000bb3 	str	x19, [x29, #16]
  400db4:	d2800013 	mov	x19, #0x0                   	// #0
  400db8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400dbc:	aa1803e2 	mov	x2, x24
  400dc0:	aa1703e1 	mov	x1, x23
  400dc4:	2a1603e0 	mov	w0, w22
  400dc8:	91000673 	add	x19, x19, #0x1
  400dcc:	d63f0060 	blr	x3
  400dd0:	eb13029f 	cmp	x20, x19
  400dd4:	54ffff21 	b.ne	400db8 <__libc_csu_init+0x48>  // b.any
  400dd8:	f9400bb3 	ldr	x19, [x29, #16]
  400ddc:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400de0:	a942dff6 	ldp	x22, x23, [sp, #40]
  400de4:	f9401ff8 	ldr	x24, [sp, #56]
  400de8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400dec:	d65f03c0 	ret

0000000000400df0 <__libc_csu_fini>:
  400df0:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400df4 <_fini>:
  400df4:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400df8:	910003fd 	mov	x29, sp
  400dfc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400e00:	d65f03c0 	ret
